62.5MHz - 2GHz integer-N PLL


The nSOSC_SIL130G_1V2 PLL2G cell is a fully-programmable PLL IP cell powered at 1.2V ±10% designed on the Silterra 130 G technology. Its input reference frequency can be chosen between 1 and 250MHz and the output between 62.5MHz and 2GHz.

Clock multiplication
Clock recovery
High-speed generator for Ser/Des PHYs
Main features: 
Type II, 3rd order low jitter PLL
Single 1.2V ±10% power supply
62.5MHz – 2GHz programmable output frequency (D = 1-16)
Programmable serialization factor (N = 1-10)
Programmable charge-pump frequency (P = 1-16)
PLL jitter spectrum optimization
-40 to +125°C junction temperature
Standby/power down mode
Low silicon surface
Main characteristics: 
1.2V ±10% power supply
-40 to +125°C
Silt 130
GDS II layouts
LEF abstracts
CDL netlists
Liberty timings
Verilog description
A full datasheet
An integration note
Silicon proven
Radiation proven: 
Automotive grade: