IO IPs

nSilition LVDS IOs are silicon proven and highly programmable. They have been used in many different applications.
All our IOs includes the following features:

TIA/EIA644A LVDS and sub-LVDS compatibility
Operate up to 2.5V supply voltages
Robuste ESD and high latch up protections
All in ring® technology allowing inclusion of your cells in the standard IO ring.

For lower supply voltages, low power LVDS cells have been developed, compatible with standard LVDS transceivers.

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	Technology	RadTol	Status	Product brief
IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO	TSMC 65 LP	No	Silicon proven	nSIO_TS65LP_2V5_1V2_COMBO_PB.pdf
IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO	TSMC 65 GP	No	Silicon proven	nSIO_TS65GP_2V5_1V0_COMBO_PB.pdf
IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO	TSMC 40 LP	No	Silicon proven	nSIO_TS40LP_2V5_1V1_COMBO_PB.pdf
IO cell combining an LVDS receiver, driver or transceiver with a double CMOS GPIO	TSMC 40 G	No	Silicon proven	nSIO_TS40G_2V5_0V9_COMBO_PB.pdf
LVDS bidirectional transceiver IO cell	TSMC 40 LP	No	Silicon proven	nSIO_TS40LP_2V5_1V1_BIDIR_PB.pdf
LVDS bidirectional transceiver IO cell	TSMC 65 GP	No	Silicon proven	nSIO_TS65GP_2V5_1V0_BIDIR_PB.pdf
LVDS bidirectional transceiver IO cell	TSMC 65 LP	No	Silicon proven	nSIO_TS65LP_2V5_1V2_BIDIR_PB.pdf
LVDS bidirectional transceiver IO cell	TSMC 40 G	No	Silicon proven	nSIO_TS40G_2V5_0V9_BIDIR_PB.pdf
LVDS IO cells library	TSMC 40 G	No	Silicon proven	nSIO_TS40G_2V5_0V9_LIB_PB.pdf
LVDS IO cells library	TSMC 65 LP	No	Silicon proven	nSIO_TS65LP_2V5_1V2_LIB_PB.pdf
LVDS IO cells library	TSMC 40 LP	No	Silicon proven	nSIO_TS40LP_2V5_1V1_LIB_PB.pdf
LVDS IO cells library	TSMC 65 GP	No	Silicon proven	nSIO_TS65GP_2V5_1V0_LIB_PB.pdf
LVDS receiver cell	TSMC 40 G	No	Silicon proven	nSIO_TS40G_2V5_0V9_RX_PB.pdf
LVDS receiver cell	TSMC 65 LP	No	Silicon proven	nSIO_TS65LP_2V5_1V2_RX_PB.pdf
LVDS receiver cell	TSMC 40 LP	No	Silicon proven	nSIO_TS40LP_2V5_1V1_RX_PB.pdf
LVDS receiver cell	TSMC 65 GP	No	Silicon proven	nSIO_TS65GP_2V5_1V0_RX_PB.pdf
LVDS transmitter cell	TSMC 40 G	No	Silicon proven	nSIO_TS40G_2V5_0V9_TX_PB.pdf
LVDS transmitter cell	TSMC 65 LP	No	Silicon proven	nSIO_TS65LP_2V5_1V2_TX_PB.pdf
LVDS transmitter cell	TSMC 40 LP	No	Silicon proven	nSIO_TS40LP_2V5_1V1_TX_PB.pdf
LVDS transmitter cell	TSMC 65 GP	No	Silicon proven	nSIO_TS65GP_2V5_1V0_TX_PB.pdf

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IO IPs